If you’ve ever wanted to jump into the world of FPGAs but don’t want to learn yet another language, you can now program an FPGA with Python.
The project is called MyHDL. This tool converts very, very simple Python code into either VHDL or Verilog. From this, a hardware description can be uploaded to an FPGA.
The portion of the Python language supported by MyHDL is extremely minimal, with only ints being the only built-in data type supported. Of course ifs and whiles are still included along with all the assignments and operators. A new addition is a way to get digital IO access with Python, and obvious requirement if you’re going to be programming Silicon.
MyHDL surely won’t replace VHDL or Verilog anytime soon, but if you’re looking to get into FPGAs and the ‘telling a chip what to be’ paradigm it offers, it’s certainly a tool worth looking into.
Hats off to [hardsoftlucid] for sending this in.

Filed under: hardware, Software Development